AD9511BCPZ Integrated Circuit Chip 1.2 GHz Clock Distribution IC Chip Golden China Supplier
digital integrated circuits
,linear integrated circuits
AD9511BCPZ Integrated Circuit Chip 1.2 GHz Clock Distribution IC Chip Golden China Supplier
FEATURES
Low phase noise phase-locked loop core
Reference input frequencies to 250 MHz
Programmable dual-modulus prescaler
Programmable charge pump (CP) current
Separate CP supply (VCPS) extends tuning range
Two 1.6 GHz, differential clock inputs
5 programmable dividers, 1 to 32, all integers
Phase select for output-to-output coarse delay adjust
3 independent 1.2 GHz LVPECL outputs
Additive output jitter 225 fs rms
2 independent 800 MHz/250 MHz LVDS/CMOS clock outputs
Additive output jitter 275 fs rms
Fine delay adjust on 1 LVDS/CMOS output
Serial control port
Space-saving 48-lead LFCSP
APPLICATIONS
Low jitter, low phase noise clock distribution
Clocking high speed ADCs, DACs, DDSs, DDCs, DUCs, MxFEs
High performance wireless transceivers
High performance instrumentation
Broadband infrastructure
GENERAL DESCRIPTION
The AD9511 provides a multi-output clock distribution function along with an on-chip PLL core.
The design emphasizes low jitter and phase noise to maximize data converter performance.
Other applications with demanding phase noise and jitter requirements also benefit from this part.
The PLL section consists of a programmable reference divider (R); a low noise phase frequency detector (PFD); a precision charge pump (CP); and a programmable feedback divider (N).
By connecting an external VCXO or VCO to the CLK2/CLK2B pins, frequencies up to 1.6 GHz may be synchronized to the input reference.
There are five independent clock outputs. Three outputs are LVPECL (1.2 GHz), and two are selectable as either LVDS (800 MHz) or CMOS (250 MHz) levels.
Each output has a programmable divider that may be bypassed or set to divide by any integer up to 32. The phase of one clock output relative to another clock output may be varied by means of a divider phase select function that serves as a coarse timing adjustment.
One of the LVDS/CMOS outputs features a programmable delay element with full-scale ranges up to 10 ns of delay. This fine tuning delay block has 5-bit resolution, giving 32 possible delays from which to choose for each full-scale setting.
The AD9511 is ideally suited for data converter clocking applications where maximum converter performance is achieved by encode signals with subpicosecond jitter. The AD9511 is available in a 48-lead LFCSP and can be operated from a single 3.3 V supply.
An external VCO, which requires an extended voltage range, can be accommodated by connecting the charge pump supply (VCP) to 5.5 V. The temperature range is −40°C to +85°C.
Temperature Range –40°C to +85°C
CPC5622A Flash Memory IC NEW AND ORIGINAL STOCK
SP706REN-L/TR Electronic Integrated Circuits Ics Chips Low Power Microprocessor Supervisory Circuits
ISD2590P Electronic IC Chips Single-Chip Voice Record / Playback Devices
SP3485CN-L/TR 3.3V 10Mbps SOIC8 Single Transmitter
74HCT245D Integrated Circuit Chip Transceiver Non Inverting 1 Element 8 Bit
MT8870 DTMF Decoder Module , Telephone Dialing Control Audio Decoder Module
CS4345-CZZR NEW AND ORIGINAL STOCK
P80C32X2BA 80C51 Programmable IC Chips , 8 bit microcontroller family common digital ic circuits
THC63LVD104C NEW AND ORIGINAL STOCK